Journal article

Characterization and 3D TCAD simulation of NOR-type flash non-volatile memories with emphasis on corner effects

The impact of 3D device architecture in aggressively scaled embedded non-volatile memories has been investigated by means of experiments and 3D TCAD simulations. A complete 3D calibration methodology covering DC and transient operating regimes has been introduced and validated against measurements for different technological options. This approach has been employed to determine the key features for device optimization. In particular, shallow trench isolation corners around the active area have been identified as critical regions of the memory cell for program and erase operations, as well as for gate coupling ratio optimization. © 2011 Elsevier Ltd. All rights reserved.


    • EPFL-ARTICLE-169916

    Record created on 2011-11-01, modified on 2017-05-10


  • There is no available fulltext. Please contact the lab or the authors.

Related material