000169228 001__ 169228
000169228 005__ 20190316235218.0
000169228 0247_ $$2doi$$a10.1109/SIES.2011.5953649
000169228 020__ $$a978-1-61284-818-1
000169228 037__ $$aCONF
000169228 245__ $$aHW-SW Implementation of a Decoupled FPU for ARM-based Cortex-M1 SoCs in FPGAs
000169228 269__ $$a2011
000169228 260__ $$c2011
000169228 336__ $$aConference Papers
000169228 520__ $$aNowadays industrial monoprocessor and multipro- cessor systems make use of hardware floating-point units (FPUs) to provide software acceleration and better precision due to the necessity to compute complex software applications. This paper presents the design of an IEEE-754 compliant FPU, targeted to be used with ARM Cortex-M1 processor on FPGA SoCs. We face the design of an AMBA-based decoupled FPU in order to avoid changing of the Cortex-M1 ARMv6-M architecture and the ARM compiler, but as well to eventually share it among different processors in our Cortex-M1 MPSoC design. Our HW- SW implementation can be easily integrated to enable hardware- assisted floating-point operations transparently from the software application. This work reports synthesis results of our Cortex-M1 SoC architecture, as well as our FPU in Altera and Xilinx FPGAs, which exhibit competitive numbers compared to the equivalent Xilinx FPU IP core. Additionally, single and double precision tests have been performed under different scenarios showing best case speedups between 8.8x and 53.2x depending on the FP operation when are compared to FP software emulation libraries.
000169228 6531_ $$afield programmable gate arrays
000169228 6531_ $$afloating point arithmetic
000169228 6531_ $$ahardware-software codesign
000169228 6531_ $$amultiprocessing systems
000169228 6531_ $$asystem-on-chip
000169228 700__ $$0245270$$g183206$$aJoven Murillo, Jaime
000169228 700__ $$aStrid, Per
000169228 700__ $$aCastells-Rufas, David
000169228 700__ $$aBagdia, Akash
000169228 700__ $$0240269$$g167918$$aDe Micheli, Giovanni
000169228 700__ $$aCarrabina, Jordi
000169228 7112_ $$dJune 15-17, 2011$$cVasteras, Sweden$$a6th IEEE International Symposium on Industrial Embedded Systems (SIES'11)
000169228 773__ $$tProceedings of the 6th IEEE International Symposium on Industrial Embedded Systems (SIES'11)$$q1-8
000169228 8564_ $$uhttps://infoscience.epfl.ch/record/169228/files/sies2011_submission_47.pdf$$zn/a$$s1081126$$yn/a
000169228 909C0 $$xU11140$$0252283$$pLSI1
000169228 909CO $$pIC$$qGLOBAL_SET$$ooai:infoscience.tind.io:169228$$pconf$$pSTI
000169228 917Z8 $$x112915
000169228 937__ $$aEPFL-CONF-169228
000169228 973__ $$rREVIEWED$$sPUBLISHED$$aEPFL
000169228 980__ $$aCONF