Area, throughput, and energy-efficiency trade-offs in the VLSI implementation of LDPC decoders
2011
Details
Title
Area, throughput, and energy-efficiency trade-offs in the VLSI implementation of LDPC decoders
Author(s)
Roth, C. ; Cevrero, A. ; Studer, C. ; Leblebici, Y. ; Burg, A.
Published in
Proceedings of the IEEE International Symposium of Circuits and Systems (ISCAS)
Pages
1772-1775
Conference
IEEE International Symposium on Circuits and Systems (ISCAS), Rio de Janeiro, Brazil, May 15-18, 2011
Date
2011
Record Appears in
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > TCL - Telecommunications Circuits Laboratory
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSM - Microelectronic Systems Laboratory
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSM - Microelectronic Systems Laboratory
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Record creation date
2011-08-21