The paper presents the programmable multiphase clock generator for switched-capacitor finite impulse response (SC FIR) circular memory filters. The proposed programmable clock circuit enables easy division of such kind of filters into different orders smaller sections, which when connected in series, lead to increase in filter efficiency: reduction of chip area, power dissipation, and rising up of the speed. The proposed clock generator enables adjustment of the impulses width, that simplifies design process and leads to structure, which is more robust to process variation. The clock circuit realized in CMOS 0.35μm technology, dissipates 22 μW from 2 V power supply.