In this paper, we present a block of adaptive weight change (AWC) mechanism for analog current-mode Kohonen's Neural Network (KNN) implemented in CMOS 0.18 μm technology. As some other essential building blocks of KNNs dealing with the calculations of the Euclidean distance, formation of a conscience mechanism and a determination of the winner-takes-all (WTA) circuits have been already developed, the AWC forms another essential step towards the realization of the network. We show that the proposed network works with small values of analog signals thus resulting in low power dissipation and chip area when compared with digital realizations of KNNs. Each neuron occupies chip area equal to about 1000 μm2 and dissipates 20 μW of power for 20 MHz input data rate.