VLSI implementation of a lattice-reduction algorithm for multi-antenna broadcast precoding

This paper describes the first VLSI implementation of lattice reduction (LR) aided multi-antenna broadcast precoding with vector perturbation. The considered LR scheme is based on Brun's algorithm for finding integer relations. We analyze its high-level architectural issues, we devise a corresponding low-complexity implementation, and, finally, we develop a suitable VLSI architecture. The resulting circuit provides reference for the true silicon complexity of LR for broadcast precoding with vector perturbation.


Published in:
2007 Ieee International Symposium On Circuits And Systems, Vols 1-11, 673-676
Presented at:
IEEE International Symposium on Circuits and Systems, New Orleans, LA, May 27-30, 2007
Year:
2007
Publisher:
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa
ISBN:
978-1-4244-0920-4
Keywords:
Laboratories:




 Record created 2011-06-06, last modified 2018-09-13


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