Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems

The paper describes an algorithm and a corresponding VLSI architecture for the implementation of linear MMSE detection in packet-based MIMO-OFDM communication systems. The advantages of the presented receiver architecture are low latency, high-throughput, and efficient resource utilization, since the hardware required for the computation of the MMSE estimators is reused for the detection. The algorithm also supports the extraction of soft information for channel decoding.


Published in:
2006 Ieee International Symposium On Circuits And Systems, Vols 1-11, Proceedings, 4102-4105
Presented at:
IEEE International Symposium on Circuits and Systems, Kos Isl, GREECE, May 21-24, 2006
Year:
2006
Publisher:
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa
ISBN:
978-0-7803-9389-9
Laboratories:




 Record created 2011-06-06, last modified 2018-03-17


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