Subthreshold Circuit Design for Ultra-Low-Power Applications

• Presented at: 9th International Workshop on Power and Timing Moedling, Optimization and Simulation (PATMOS 2009), Delft, Netherlands, September 9-11
• Published in: Proceedings of the 9th International Workshop on Power and Timing Moedling, Optimization and Simulation (PATMOS 2009)
• Publication date: 2009

Reference

• EPFL-CONF-164756

Record created on 2011-04-07, modified on 2017-05-10