Evaluation of Domain Decomposition Approach for Compact Simulation of On-Chip Coupled Problems

Continued device scaling into the nanometer region has given rise to new effects that previously had a negligible impact but now present greater challenges to successful design of mixed-signal silicon. This paper evaluates Domain Decomposition (DD) strategies for compact simulation of on-chip coupled problems from a computational perspective, using the recently completed CHAMELEON-RF software prototype on several standard benchmark structures.


Editor(s):
Bock, Hans-Georg
Hoog, Frank
Mattheij, Robert
Neunzert, Helmut
Scherzer, Otmar
Roos, Janne
Costa, Luis R. J.
Friedman, Avner
Gupta, Arvind
Neunzert, Helmut
Pulleyblank, William R.
Rusten, Torgeir
Santosa, Fadil
Tornberg, Anna-Karin
Capasso, Vincenzo
Published in:
Scientific Computing in Electrical Engineering SCEE 2008
Year:
2010
Publisher:
Berlin Heidelberg, Springer
ISBN:
978-3-642-12294-1
Laboratories:


Note: The status of this file is: EPFL only


 Record created 2011-03-28, last modified 2018-03-17

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