000164471 001__ 164471
000164471 005__ 20181001181832.0
000164471 020__ $$a978-0-7695-4395-6/11
000164471 0247_ $$2doi$$a10.1109/CCGrid.2011.64
000164471 037__ $$aCONF
000164471 245__ $$aGPGPU-Accelerated Parallel and Fast Simulation of Thousand-core Platforms
000164471 269__ $$a2011
000164471 260__ $$aNew York$$bIEEE/ACM Press$$c2011
000164471 336__ $$aConference Papers
000164471 520__ $$aThe multicore revolution and the ever-increasing complexity of computing systems is dramatically changing system design, analysis and programming of computing platforms.  Future architectures will feature hundreds to thousands of simple processors and on-chip memories connected through a network-on-chip. Architectural simulators will remain primary tools for design space exploration, software development and performance evaluation of these massively parallel architectures.  However, architectural simulation performance is a serious concern, as virtual platforms and simulation technology are not able to tackle the complexity of thousands of core future scenarios. The main contribution of this paper is the development of a new simulation approach and technology for many core processors which exploit the enormous parallel processing capability of low-cost and widely available.  General Purpose Graphic Processing Units (GPGPU). The simulation of many-core architectures exhibits indeed a high level of parallelism and is inherently parallelizable, but GPGPU acceleration of architectural simulation requires an in-depth revision of the data structures and functional partitioning traditionally used in parallel simulation. We demonstrate our GPGPU simulator on a target architecture composed by several cores (i.e. ARM ISA based), with instruction and data caches, connected through a Network-on-Chip (NoC). Our experiments confirm the feasibility of our approach. 
000164471 6531_ $$aGPU
000164471 6531_ $$aGPGPU
000164471 6531_ $$aNVIDIA
000164471 6531_ $$asimulation
000164471 6531_ $$amany-core
000164471 6531_ $$aembedded systems
000164471 6531_ $$aparallel systems
000164471 6531_ $$adesign exploration
000164471 700__ $$aPinto, Christian
000164471 700__ $$0242435$$aRaghav, Shivani$$g196316
000164471 700__ $$aMarongiu, Andrea
000164471 700__ $$0242429$$aRuggiero, Martino$$g195733
000164471 700__ $$0240268$$aAtienza Alonso, David$$g169199
000164471 700__ $$aBenini, Luca
000164471 7112_ $$aCCGRID 2011$$cNewport Beach, Califorinia, USA$$dMay 23-26, 2011
000164471 773__ $$j1$$k1$$q53-62$$t11th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing
000164471 8564_ $$s513650$$uhttps://infoscience.epfl.ch/record/164471/files/CCGRID2011-pinto_et_al.pdf$$yPublisher's version$$zn/a
000164471 909C0 $$0252050$$pESL$$xU11977
000164471 909CO $$ooai:infoscience.tind.io:164471$$pconf$$pSTI$$qGLOBAL_SET
000164471 917Z8 $$x160527
000164471 917Z8 $$x169199
000164471 937__ $$aEPFL-CONF-164471
000164471 973__ $$aEPFL$$rREVIEWED$$sPUBLISHED
000164471 980__ $$aCONF