Design Experiences of a CMOS LNA for mm-waves

This paper describes some of the design experiences achieved during the design, simulation and characterization of a Complementary Metal-Oxide Semiconductor (CMOS) LNA which has been designed for 24GHz and fabricated in a standard 0.180 µm technology. More specifically, some technological limitations of the CMOS process for mm-wave applications are considered, before showing the outcomes of the schematic and post-layout simulations as well as the measurements and discussing the reasons for the difference between simulations and measurements. It is shown that the simulation results can be significantly improved using Electro-Magnetic (EM) post-layout simulations. Moreover, a post-layout simulation methodology allowing a straightforward integration of the EM simulations into the workflow is proposed.

Published in:
Proceedings of the PRIME2010, 6th Conference on Ph.D. Research in Microeletronics & Electronics, 1-4
Presented at:
PRIME2010, 6th Conference on Ph.D. Research in Microeletronics & Electronics (PRIME 2010), Berlin, Germany, July 18-21, 2010

Note: The status of this file is: EPFL only

 Record created 2011-03-14, last modified 2018-01-28

External link:
Download fulltext
Rate this document:

Rate this document:
(Not yet reviewed)