Power Efficient Hardware Implementation of a Fuzzy Neural Network

This paper presents a digital, transistor level implemented neo-fuzzy neural network. This type of neural network is particularly well suited for real-time applications like those encountered in signal processing and nonlinear system identification. We consider in detail a flexible reconfigurable circuit of a single nonlinear synapse of this network. When combining such circuits, single-layer or multilayer networks can be designed. The advantages of the proposed circuit come in the form of reduced redundancy, high data rate due to parallel operation, low power consumption, and an overall flexibility of system configuration.


Published in:
Proceedings of the 17th International Conference "Mixed Design of Integrated Circuits and Systems" (MIXDES), 576-580
Presented at:
17th International Conference "Mixed Design of Integrated Circuits and Systems" (MIXDES), Wroclaw, Poland, June 24-26, 2010
Year:
2010
Publisher:
Technical University of Lodz
Keywords:
Laboratories:


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 Record created 2011-02-14, last modified 2018-09-13

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