Synchronization and Power Integrity Issues in 3-D ICs

Several challenges should be resolved for three dimensional integration to evolve to a mainstream technology. Among these challenges, the issues of synchronization and power integrity become predominant due to the multiple planes and the heterogeneity of 3-D circuits. The paper offers an overview of the state of the art research related to these global in nature issues. Experimental results, design techniques, and models are discussed highlighting the possible means and requirements for the design of reliable synchronization and power distribution schemes in 3-D circuits.


Published in:
Proceedings of Asia Pacific Conference on Circuits and Systems, 536-539
Presented at:
IEEE Asia Pacific Conference on Circuits and Systems, Kuala Lumpur, Malaysia, December 6-9, 2010
Year:
2010
Publisher:
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa
Keywords:
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 Record created 2011-01-20, last modified 2018-09-13

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