Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

This paper presents a methodology for digitally calibrating analog circuits and systems. Based on the detection of an imperfection by a simple comparator, a successive approximations algorithm tunes a compensation current. The latter is generated by a sub-binary radix M/2(+)M DAC, which has the advantage of allowing reaching arbitrarily high resolutions at the cost of extremely small area. The methodology proposed allows the removal of any type of imperfections, at the expense of two shift registers, a few logical gates and a DAC which is smaller than the shift register.

Published in:
Mixdes 2009: Proceedings Of The 16Th International Conference Mixed Design Of Integrated Circuits And Systems, 456-461
Presented at:
16th International Conference Mixed Design of Integrated Circuits and Systems, Lodz, POLAND, Jun 25-27, 2009
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa
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View record in Web of Science
Scopus: 2-s2.0-72149113013

 Record created 2010-11-30, last modified 2018-01-28

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