Infoscience

Conference paper

An Integrated CMOS Receiver Chip for NMR-Applications

We present the first CMOS-only receiver chip for NMR-applications at 300 MHz. The system consists of an on-chip reception coil, a tuning-capacitor, a downconversion-mixer and a low-frequency gain-stage as well as biasing and offset-compensation circuitry. It has an input referred voltage noise density of 0.7 nV/root Hz and a gain of 75dB. The power consumption is 18 mA from a single 3.3 V supply. The chip is realized in 0.35 mu m technology and occupies an area of 1200 x 850 mu m(2).

Fulltext

  • There is no available fulltext. Please contact the lab or the authors.

Related material