000155214 001__ 155214
000155214 005__ 20190316234939.0
000155214 0247_ $$2doi$$a10.1109/TCAD.2010.2085250
000155214 022__ $$a0028-0070
000155214 037__ $$aARTICLE
000155214 245__ $$aAn Efficient Gate Library for Ambipolar CNTFET Logic
000155214 269__ $$a2011
000155214 260__ $$c2011
000155214 336__ $$aJournal Articles
000155214 520__ $$aRecently, several emerging technologies have been reported as potential candidates for controllable ambipolar devices. Controllable ambipolarity is a desirable property that enables the on-line configurability of n-type and p-type device polarity. In this paper, we introduce a new design methodology for logic gates based on controllable ambipolar devices, with an emphasis on carbon nanotubes as the candidate technology. Our technique results in ambipolar gates with a higher expressive power than conventional complementary metal-oxidesemiconductor (CMOS) libraries. We propose a library of static ambipolar carbon nanotube field effect transistor (CNTFET) gates based on generalized NOR-NAND-AOI-OAI primitives, which efficiently implements XOR-based functions. Technology mapping of several multi-level logic benchmarks that extensively use the XOR function, including multipliers, adders, and linear circuits, with ambipolar CNTFET logic gates indicates that on average, it is possible to reduce the number of logic levels by 42%, the delay by 26%, and the power consumption by 32%, resulting in a energy-delay-product (EDP) reduction of 59% over the same circuits mapped with unipolar CNTFET logic gates. Based on the projections in [1], where it is stated that defectfree CNTFETs will provide a 5× performance improvement over metal-oxide-semiconductor field effect transistors, the ambipolar library provides a performance improvement of 7×, a 57% reduction in power consumption, and a 20× improvement in EDP over the CMOS library.
000155214 6531_ $$aAmbipolar carbon nanotubes
000155214 6531_ $$aAmbipolar silicon nanowires
000155214 6531_ $$aAmbipolarity
000155214 6531_ $$aLogic design
000155214 6531_ $$aLogic synthesis
000155214 700__ $$aBen Jamaa, Haykel
000155214 700__ $$aMohanram, Kartik
000155214 700__ $$0240269$$g167918$$aDe Micheli, Giovanni
000155214 773__ $$j30$$tIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems$$k2$$q242-255
000155214 8564_ $$uhttps://infoscience.epfl.ch/record/155214/files/05690255.pdf$$zn/a$$s1454532$$yn/a
000155214 909C0 $$xU11140$$0252283$$pLSI1
000155214 909CO $$particle$$qGLOBAL_SET$$ooai:infoscience.tind.io:155214$$pSTI$$pIC
000155214 917Z8 $$x176271
000155214 917Z8 $$x176271
000155214 917Z8 $$x112915
000155214 917Z8 $$x112915
000155214 917Z8 $$x112915
000155214 937__ $$aEPFL-ARTICLE-155214
000155214 973__ $$rREVIEWED$$sPUBLISHED$$aEPFL
000155214 980__ $$aARTICLE