Analytical Modeling of the Suspended-Gate FET and Design Insights for Digital Logic


Published in:
2007 65th Annual Device Research Conference, 103-104
Presented at:
2007 65th Annual Device Research Conference, South Bend, IN, USA, 18-20 06 2007
Year:
2007
Publisher:
IEEE
Laboratories:




 Record created 2010-11-08, last modified 2018-09-13


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