Non-hysteretic ferroelectric tunnel FET with improved conductance at Curie temperature

Tunnel FETs (TFETs) have attracted much interest in the last decade for their potential to be used as small slope switches [1,2], suitable for future logic circuits operating with a supply voltage smaller than 0.5 V and for reduced Ioff levels. It has been shown that these devices highly benefit from a high gate dielectric constant, as the gate-channel capacitive coupling is improved, positively impacting the band-to-band tunneling at low voltages [3]. Temperature-dependent performances have also been studied: models and experiments show a slight degradation of TFET subthreshold slope and an increase in the Ion with temperature, due to energy bandgap narrowing [4,5]. In parallel, the integration of ferroelectric materials in MOSFET gate stacks is being considered for enhancing their subthreshold swing [6]. Furthermore, ferroelectric materials show a unique temperature behavior. According to Landau's theory, at the Curie temperature (Tc) the relative dielectric permittivity εFe ideally diverges [7] (Fig. 1). © 2010 IEEE.

Published in:
Device Research Conference - Conference Digest, DRC, null, null, 67-68

 Record created 2010-11-08, last modified 2018-01-28

Rate this document:

Rate this document:
(Not yet reviewed)