Design guidelines for CMOS current steering logic
Saez, R. T. L.; Kayal, M.; Declercq, M.; Schneider, M. C.
1997

Abstract

Closed-form expressions for static and dynamic parameters have been derived for the Current Steering Logic (CSL) inverter. Measurements and simulation results that validate these expressions are presented for a 2.5V power supply, Design guidelines are given for the application of CSL gates in low voltage, low power mixed analog/digital circuits.

Details

Title Design guidelines for CMOS current steering logic
Author(s) Saez, R. T. L. ; Kayal, M. ; Declercq, M. ; Schneider, M. C.
Published in Iscas '97 - Proceedings of 1997 Ieee International Symposium on Circuits and Systems, Vols I - Iv
Pages 1872-1875
Date 1997
Note 1997 IEEE International Symposium on Circuits and Systems (ISCAS 97) - Circuits and Systems in the Information Age
Jun 09-12, 1997
Hong kong, hong kong
DOI https://doi.org/10.1109/ISCAS.1997.621514
Other identifier(s) View record in Web of Science
Laboratories ELAB
Record Appears in Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > ELAB - Electronics Laboratory
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Record creation date 2010-10-21