000153558 001__ 153558
000153558 005__ 20190812205438.0
000153558 0247_ $$2doi$$a10.1109/ESSCIRC.2009.5326033
000153558 020__ $$a978-1-4244-4355-0
000153558 02470 $$2ISI$$a000276195800064
000153558 02470 $$a2-s2.0-72849131449$$2Scopus
000153558 037__ $$aCONF
000153558 245__ $$aA 300Hz 19b DR capacitive accelerometer based on a versatile front end in a 5th-order ΔΣ loop
000153558 260__ $$bIeee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa$$c2009
000153558 269__ $$a2009
000153558 336__ $$aConference Papers
000153558 490__ $$aProceedings of the European Solid-State Circuits Conference
000153558 500__ $$aSTI IEL ELab., EPFL, Lausanne, Switzerland IME, FHNW, Windisch, Switzerland Colibrys SA, Neuchâtel, Switzerland
000153558 500__ $$aExport Date: 19 January 2010
000153558 500__ $$aSource: Scopus
000153558 500__ $$aArt. No.: 5326033
000153558 500__ $$aReferences: Condemine, C., A 0.8mA 50Hz 15b SNDR ΔΣ Closed-Loop 10g Accelerometer Using an 8th-order Digital Compensator (2005) ISSCC Dig. Tech. Papers, pp. 248-249. , Feb; Amini, B.V., Abdolvand, R., Ayazi, F., A 4.5mW Closed-Loop ΔΣ Micro-Gravity CMOS-SOI Accelerometer (2006) ISSCC Dig. Tech. Papers, pp. 1001-1002. , Feb; Wu, J., Fedder, G.K., Carley, L.R., A Low-Noise Low-Offset Chopper-Stabilized Capacitive-Readout Amplifier for CMOS MEMS Accelerometers (2002) ISSCC Dig. Tech. Papers, 478, pp. 428-429. , Feb; Wu, J., Fedder, G.K., Carley, L.R., A Low-Noise Low-Offset Capacitive Sensing Amplifier for a 50-μg/√Hz Monolithic CMOS MEMS Accelerometer (2004) IEEE J. Solid-State Circuits, 39, pp. 722-730. , May
000153558 520__ $$aThis paper presents a 5th-order ΔΣ capacitive accelerometer. The ΔΣ loop is implemented in mixed signal, the global 5th-order filter having a 2nd-order analog and a 3rd-order digital part. The system can be used with a wide range of sensors, because the mixed-signal front end is programmable. The ASIC developed comprises a voltage-mode preamplifier, two parallel demodulators implementing CDS, and a 7-bit Flash ADC. The latter drives a 3rd-order digital filter, which can be configured for different sensor parameters in order to ensure overall loop stability and optimize the noise performance. With a low-noise MEMS sensor, the system achieves a 19-bit DR and a 16-bit SNR, both over a 300Hz bandwidth.
000153558 700__ $$0244585$$g111342$$aPastre, M.
000153558 700__ $$0240539$$g105540$$aKayal, M.
000153558 700__ $$aSchmid, H.
000153558 700__ $$aHuber, A.
000153558 700__ $$aZwahlen, P.
000153558 700__ $$aNguyen, A. M.
000153558 700__ $$aDong, Y.
000153558 7112_ $$dSep 14-18, 2009$$cAthens, GREECE$$a35th European Solid-State Circuits Conference (ESSCIRC 2009)
000153558 773__ $$t2009 Proceedings Of Esscirc$$q289-292
000153558 909C0 $$xU11978$$pELAB$$0252315
000153558 909CO $$pconf$$pSTI$$ooai:infoscience.tind.io:153558
000153558 937__ $$aEPFL-CONF-153558
000153558 973__ $$rREVIEWED$$sPUBLISHED$$aEPFL
000153558 980__ $$aCONF