This paper presents a methodology of a basic analog blocks retargeting from bulk to fully depleted (FD) SOI technology. The design methodology is generally not related to the model used for the circuit simulations. However, the proposed one is closely linked to the EKV MOS model [1] that has been chosen for the FD SOI circuit simulations. Same of EKV parameters are used and expressions along with the g(m)/I-D design approach to demonstrate that the basic analog circuits are simply retargeted from bulk to SOL.