Transient charge pumping as an efficient technique to measure low light intensity with PD SOI MOSFET
2008
Abstract
In this paper, we present a new method to measure light intensity in a floating body partially depleted SOI MOSFET. The photo-generated charge density in the MOSFET is converted into a charge pumping frequency needed to maintain the drain current at a constant value. This new approach contrasts with conventional techniques that rely on an accurate drain current evaluation. According to our measurements, flux densities as low as 2 mW/m2 were obtained using a regular SOI MOSFET, thus confirming the potentials of this approach. © 2007 Elsevier Ltd. All rights reserved.
Details
Title
Transient charge pumping as an efficient technique to measure low light intensity with PD SOI MOSFET
Author(s)
Harik, L. ; Sallese, Jean-Michel ; Kayal, M.
Published in
Solid-State Electronics
Volume
52
Issue
5
Pages
597-605
Date
2008
ISSN
0038-1101
Keywords
Note
Ecole Ploytechnique Fédérale de Lausanne, Electronics Laboratory (LEG), EPFL-STI-IMM LEG1, ELB 331, Station 11, 1015 Lausanne, Vaud, Switzerland
Cited By (since 1996): 2
Export Date: 19 January 2010
Source: Scopus
References: Hill JM, Lachman J. A 900 MHz 2.25 MB cache with on chip CPU now in CU SOI. In: ISSCC 2001, Session 11. SRAM 11.5Okhonin, S., Nagoga, M., Sallese, J.-M., Fazan, P., A capacitor-less 1T DRAM (2002) IEEE Electron Dev Lett, 23 (2), pp. 85-87; Gamal, A.E., Eltoukhy, H., An introduction to the technology, design and performance limits, presenting recent developments and future directions (2005) IEEE Circuit Dev, (May-June); Culurciello, E., Three-dimensional phototransistors in 3D silicon-on-insulator technology (2007) IET Electron Lett, 43 (7), pp. 418-420; Culurciello, E., Weerakoon, P., Three-Dimensional Photodetectors in 3D Silicon-on-insulator technology (2007) IEEE Electron Dev Lett, 28 (2), pp. 117-119; Fossum, E., CMOS imager sensors: electronic camera-on-a-chip (1997) IEEE Trans Electron Dev, 44, p. 10; Sandage R, Connelly J. A fingerprint opto-detector using lateral bipolar phototransistors in a standard CMOS process. In: IEDM technical digest, 1995. p. 171-4Yamamoto, H., Taniguchi, K., Hamaguchi, C., High-sensitivity SOI MOS photodetector with self-amplification (1996) J Appl Phys, 35, pp. 1382-1386; Zhang, W., Chan, M., Fung, S., Ko, P., Performance of a CMOS compatible lateral bipolar photodetector on SOI substrate (1998) Electron Dev Lett, 19, pp. 435-437; Parke S, Assaderaghi F, Chen J, King J, Hu C, Ko P. A versatile, SOI BICMOS technology with complementary lateral BJT. In: IEDM technical digest, 1992. p. 453-6Parke, S., Hu, C., Ko, P., Bipolar-FET hybrid-mode operation of quarter-micrometer SOI MOSFET (1993) Electron Dev Lett, 14, pp. 234-236; Shen C, Xu C, Hang R, Ko P, Chan M. Improved SOI image sensor design based on backside illumination on silicon on saphire (SoS) substrate. In: 2002 IEEE SOI international conference, October 2002. p. 73-74Brouk, I., Alameh, K., Nemirovsky, Y., Design and Characterization of CMOS/SOI Image Sensors (2007) IEEE Trans Electron Dev, 54 (3), pp. 468-475; Wei, A., Sherony, M.J., Antoniadis, D., Analysis and characteristics in silicon on insulator MOSFETs using two-carrier modeling (1995) IEEE Electron Dev Lett, 16 (11), pp. 494-496; Kato, K., Wada, T., Taniguchi, K., Transient behavior of the kink effect in partially-depleted SOI MOSFETs (1985) IEEE J Solid State Circuits, sc-20 (1), pp. 378-382; Okhonin, S., Nagoga, M., Fazan, P., Principles of transient charge pumping on partially depleted SOI MOSFETs (2002) IEEE Electron Dev Lett, 23 (May), pp. 279-281; Zhang, W., Chan, M., Ko, P.K., Performance of the floating gate/body tied NMOSFET photodetector on SOI substrate (2000) IEEE Trans Electron Dev, 47 (7), pp. 1375-1384; Sallese, J.-M., Krummenacher, F., Fazan, P., Derivation of Shockley-Read-Hall recombination rates in bulk and PD-SOI MOSFET'S channels valid in all modes of operation (2004) Solid State Electron, 48, pp. 1539-1548; Heremans, P., Witters, J., Groeseneken, G., Maes, H.E., Analysis of the charge pumping technique and its application for the evaluation of MOSFET degradation (1989) IEEE Trans Electron Dev, 36 (7), pp. 1318-1335; Marshall, A., Natarajan, S., (2002) SOI design: analog, memory and digital techniques, , Kluwer Academic Publishers; Sallese, J.-M., Bucher, M., Krummenacher, F., Fazan, P., Inversion charge linearization in MOSFET modeling and rigorous derivation of the EKV compact model (2003) Solid State Electron, 47, pp. 677-683; Sallese, J.-M., Porret, A.-S., A novel approach to charge-based non-quasi-static model of the MOS transistor valid in all modes of operation (2000) Solid State Electron, 44, pp. 887-894
Cited By (since 1996): 2
Export Date: 19 January 2010
Source: Scopus
References: Hill JM, Lachman J. A 900 MHz 2.25 MB cache with on chip CPU now in CU SOI. In: ISSCC 2001, Session 11. SRAM 11.5Okhonin, S., Nagoga, M., Sallese, J.-M., Fazan, P., A capacitor-less 1T DRAM (2002) IEEE Electron Dev Lett, 23 (2), pp. 85-87; Gamal, A.E., Eltoukhy, H., An introduction to the technology, design and performance limits, presenting recent developments and future directions (2005) IEEE Circuit Dev, (May-June); Culurciello, E., Three-dimensional phototransistors in 3D silicon-on-insulator technology (2007) IET Electron Lett, 43 (7), pp. 418-420; Culurciello, E., Weerakoon, P., Three-Dimensional Photodetectors in 3D Silicon-on-insulator technology (2007) IEEE Electron Dev Lett, 28 (2), pp. 117-119; Fossum, E., CMOS imager sensors: electronic camera-on-a-chip (1997) IEEE Trans Electron Dev, 44, p. 10; Sandage R, Connelly J. A fingerprint opto-detector using lateral bipolar phototransistors in a standard CMOS process. In: IEDM technical digest, 1995. p. 171-4Yamamoto, H., Taniguchi, K., Hamaguchi, C., High-sensitivity SOI MOS photodetector with self-amplification (1996) J Appl Phys, 35, pp. 1382-1386; Zhang, W., Chan, M., Fung, S., Ko, P., Performance of a CMOS compatible lateral bipolar photodetector on SOI substrate (1998) Electron Dev Lett, 19, pp. 435-437; Parke S, Assaderaghi F, Chen J, King J, Hu C, Ko P. A versatile, SOI BICMOS technology with complementary lateral BJT. In: IEDM technical digest, 1992. p. 453-6Parke, S., Hu, C., Ko, P., Bipolar-FET hybrid-mode operation of quarter-micrometer SOI MOSFET (1993) Electron Dev Lett, 14, pp. 234-236; Shen C, Xu C, Hang R, Ko P, Chan M. Improved SOI image sensor design based on backside illumination on silicon on saphire (SoS) substrate. In: 2002 IEEE SOI international conference, October 2002. p. 73-74Brouk, I., Alameh, K., Nemirovsky, Y., Design and Characterization of CMOS/SOI Image Sensors (2007) IEEE Trans Electron Dev, 54 (3), pp. 468-475; Wei, A., Sherony, M.J., Antoniadis, D., Analysis and characteristics in silicon on insulator MOSFETs using two-carrier modeling (1995) IEEE Electron Dev Lett, 16 (11), pp. 494-496; Kato, K., Wada, T., Taniguchi, K., Transient behavior of the kink effect in partially-depleted SOI MOSFETs (1985) IEEE J Solid State Circuits, sc-20 (1), pp. 378-382; Okhonin, S., Nagoga, M., Fazan, P., Principles of transient charge pumping on partially depleted SOI MOSFETs (2002) IEEE Electron Dev Lett, 23 (May), pp. 279-281; Zhang, W., Chan, M., Ko, P.K., Performance of the floating gate/body tied NMOSFET photodetector on SOI substrate (2000) IEEE Trans Electron Dev, 47 (7), pp. 1375-1384; Sallese, J.-M., Krummenacher, F., Fazan, P., Derivation of Shockley-Read-Hall recombination rates in bulk and PD-SOI MOSFET'S channels valid in all modes of operation (2004) Solid State Electron, 48, pp. 1539-1548; Heremans, P., Witters, J., Groeseneken, G., Maes, H.E., Analysis of the charge pumping technique and its application for the evaluation of MOSFET degradation (1989) IEEE Trans Electron Dev, 36 (7), pp. 1318-1335; Marshall, A., Natarajan, S., (2002) SOI design: analog, memory and digital techniques, , Kluwer Academic Publishers; Sallese, J.-M., Bucher, M., Krummenacher, F., Fazan, P., Inversion charge linearization in MOSFET modeling and rigorous derivation of the EKV compact model (2003) Solid State Electron, 47, pp. 677-683; Sallese, J.-M., Porret, A.-S., A novel approach to charge-based non-quasi-static model of the MOS transistor valid in all modes of operation (2000) Solid State Electron, 44, pp. 887-894
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Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > EDLAB - Group of Electron Device Modeling and Technology
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > ELAB - Electronics Laboratory
Peer-reviewed publications
Work produced at EPFL
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Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > ELAB - Electronics Laboratory
Peer-reviewed publications
Work produced at EPFL
Journal Articles
Published
Record creation date
2010-10-21