SOI capacitor-less 1-transistor DRAM sensing scheme with automatic reference generation
2004
Details
Title
SOI capacitor-less 1-transistor DRAM sensing scheme with automatic reference generation
Author(s)
Blagojevic, M. ; Pastre, M. ; Kayal, M. ; Fazan, P. ; Okhonin, S. ; Nagoga, M. ; Declercq, M.
Published in
2004 Symposium on Vlsi Circuits, Digest of Technical Papers
Pages
182-183
Conference
Symposium on VLSI Circuits, June 17-19, 2004, Honolulu, HI
Date
2004
Other identifier(s)
View record in Web of Science
Record Appears in
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > ELAB - Electronics Laboratory
Scientific production and competences > STI - School of Engineering > STI Archives > LEG1 - Electronics Laboratory 1
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Scientific production and competences > STI - School of Engineering > STI Archives > LEG1 - Electronics Laboratory 1
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Record creation date
2010-10-21