Analysis of degradation mechanisms in lattice-matched InAlN/GaN high-electron-mobility transistors
We address degradation aspects of lattice-matched unpassivated InAlN/GaN high-electron-mobility transistors (HEMTs). Stress conditions include an off-state stress, a semi-on stress (with a partially opened channel), and a negative gate bias stress (with source and drain contacts grounded). Degradation is analyzed by measuring the drain current, a threshold voltage, a Schottky contact barrier height, a gate leakage and an ideality factor, an access, and an intrinsic channel resistance, respectively. For the drain-gate bias < 38 V parameters are only reversibly degraded due to charging of the pre-existing surface states. This is in a clear contrast to reported AlGaN/GaN HEMTs where an irreversible damage and a lattice relaxation have been found for similar conditions. For drain-gate biases over 38 V InAlN/GaN HEMTs show again only temporal changes for the negative gate bias stresses; however, irreversible damage was found for the off-state and for the semi-on stresses. Most severe changes, an increase in the intrinsic channel resistance by one order of magnitude and a decrease in the drain current by similar to 70%, are found after the off-state similar to 50 V drain-gate bias stresses. We conclude that in the off-state condition hot electrons may create defects or ionize deep states in the GaN buffer or at the InAlN/GaN interface. If an InAlN/GaN HEMT channel is opened during the stress, lack of the strain in the barrier layer is beneficial for enhancing the device stability.
Keywords: aluminium compounds ; gallium compounds ; high electron mobility ; transistors ; hot carriers ; III-V semiconductors ; indium compounds ; Schottky barriers ; surface states ; wide band gap semiconductors ; CURRENT COLLAPSE ; INALN/ALN/GAN HEMTS ; ALGAN/GAN HEMTS ; FIELD ; GATE ; HETEROSTRUCTURE ; VOLTAGE ; RELIABILITY
Record created on 2010-10-05, modified on 2016-08-08