An Asynchronous Programmable Parallel 2-D Image Filter CMOS IC Based on the Gilbert Multiplier

A novel analogue power-efficient 2-D programmable finite impulse response image filter is proposed. This solution is based on the current-mode Gilbert-vector-multiplier operating in the weak inversion region, which allows for ultra low power operation. The main advantage is in the asynchronous and parallel calculation of all pixel values without using any clock generator. The filter is a programmable structure that allows programmability of different filter masks both low-pass and high-pass. An experimental filter integrated circuit with a resolution of 6x1 pixels dissipates in measurements a power of 30 μW at a data rate of 30 kframes/s in a 180 nm CMOS technology. One of the intended applications of our proposed image filter is in data compression in wireless endoscopic capsules.

Published in:
Proceedings of the Conference on Biomedical Electronics and Devices (BIODEVICES), 46-51
Presented at:
Conference on Biomedical Electronics and Devices (BIODEVICES), Porto, Portugal, January 14-17, 2009
Insticc-Inst Syst Technologies Information Control & Communication, Avenida D Manuel L, 27A 2 Esquerdo, Setubal, 2910-595, Portugal

Note: The status of this file is: EPFL only

 Record created 2010-07-12, last modified 2018-09-13

Download fulltext

Rate this document:

Rate this document:
(Not yet reviewed)