A VHDL-AMS Modeling Methodology for Top-Down/Bottom-Up Design of RF Systems
This chapter presents a modeling methodology for the top-down/bottom-up design of RF systems based on systematic use of VHDL-AMS models. The model interfaces are parameterizable and pin-accurate. The designer can choose to parameterize the models using performance specifications or device parameters back-annotated from the transistor-level implementation. The abstraction level used for the description of the respective analog/digital component behavior has been chosen to achieve a good trade-off between accuracy, fidelity, and simulation performance. These properties make the models suitable for different design tasks such as architectural exploration or overall system validation. This is demonstrated on a model of a binary FSK transmitter parameterized to meet very different target specifications. The achieved flexibility and systematic model documentation facilitate their reuse in other design projects.