000146591 001__ 146591
000146591 005__ 20190716102934.0
000146591 037__ $$aCONF
000146591 245__ $$aHardware synthesis of complex standard interfaces using CAL dataflow descriptions
000146591 260__ $$c2009
000146591 269__ $$a2009
000146591 336__ $$aConference Papers
000146591 520__ $$aThis paper presents a contribution to the development of rapid prototyping tools based on data-flow description. In this context, the efficiency of automatic translator tools from the data-flow description to C and/or HDL are presented using two design cases. Moreover, this paper presents the novel concept of the automatic synthesis of interfaces based on dataflow description. Such “generic” interfaces include an embedded microprocessor, which enables using a vide variety of interfaces already available as optimized libraries from the FPGA manufacturers. The different design cases described have been tested and validated on different platforms. The results of the work show the flexibility and generality of the proposed wrapper methodology that is described in the paper.
000146591 700__ $$0244298$$g178657$$aThavot, Richard
000146591 700__ $$0244294$$g176039$$aMosqueron, Romuald
000146591 700__ $$aDubois, Julien
000146591 700__ $$0240111$$g102553$$aMattavelli, Marco
000146591 7112_ $$dSeptember 22-24, 2009$$cSophia Antipolis$$aDASIP
000146591 8564_ $$uhttps://infoscience.epfl.ch/record/146591/files/Hardware%20Synthesis%20of%20Complex%20Standard%20Interfaces%20Using%20CAL%20Dataflow%20Descriptions.pdf$$zn/a$$s441392
000146591 909C0 $$xU12149$$0252288$$pSCI-STI-MM
000146591 909CO $$qGLOBAL_SET$$pconf$$pSTI$$ooai:infoscience.tind.io:146591
000146591 937__ $$aGR-LSM-CONF-2010-017
000146591 973__ $$rREVIEWED$$sPUBLISHED$$aEPFL
000146591 980__ $$aCONF