Memory Organization and Data Layout for Instruction Set Extensions with Architecturally Visible Storage

Present application specific embedded systems tend to choose instruction set extensions (ISEs) based on limitations imposed by the available data bandwidth to custom functional units (CFUs). Adoption of the optimal ISE for an application would, in many cases, impose formidable cost increase in order to achieve the required data bandwidth. In this paper we propose a novel methodology for laying out data in memories, generating highbandwidth memory systems by making use of existing lowbandwidth low-cost ones and designing custom functional units all with the desirable data bandwidth for only a fraction of the additional cost required by traditional techniques.

Published in:
Proceedings of the International Conference on Computer-Aided Design
Presented at:
International Conference on Computer-Aided Design, San Jose, California, USA, November 2-5, 2009

Note: The status of this file is: EPFL only

 Record created 2010-01-20, last modified 2018-11-14

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