Abstract

We investigate the equivalent oxide thickness of a thin oxide interlayer in gate insulator stacks on silicon. Through the use of a first-principles approach, we map the profile of the local permittivity across two interface models showing different suboxide structures. These models incorporate the available atomic-scale experimental data and account for the amorphous nature of the oxide. The equivalent oxide thickness of the interfacial oxide layer is found to be smaller than the corresponding physical thickness by 0.2-0.3 nm. We discuss implications of these results for future device scaling. (c) 2005 American Institute of Physics.

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