000140305 001__ 140305
000140305 005__ 20190316234607.0
000140305 0247_ $$2doi$$a10.1109/HPCA.2009.4798239
000140305 037__ $$aCONF
000140305 245__ $$aPractical Off-chip Meta-data for Temporal Memory Streaming
000140305 269__ $$a2009
000140305 260__ $$c2009
000140305 336__ $$aConference Papers
000140305 520__ $$aPrior research demonstrates that temporal memory streaming and related address-correlating prefetchers improve performance of commercial server workloads though increased memory level parallelism. Unfortunately, these prefetchers require large on-chip meta-data storage, making previously- proposed designs impractical. Hence, to improve practicality, researchers have sought ways to enable timely prefetch while locating meta-data entirely off-chip. Unfortunately, current solutions for off-chip meta-data increase memory traffic by over a factor of three. We observe three requirements to store meta-data off chip: minimal off-chip lookup latency, bandwidthefficient meta-data updates, and off-chip lookup amortized over many prefetches. In this work, we show: (1) minimal off-chip meta-data lookup latency can be achieved through a hardware-managed main memory hash table, (2) bandwidth-efficient updates can be performed through probabilistic sampling of meta-data updates, and (3) off-chip lookup costs can be amortized by organizing meta-data to allow a single lookup to yield long prefetch sequences. Using these techniques, we develop Sampled Temporal Memory Streaming (STMS), a practical address-correlating prefetcher that keeps predictor meta-data in main memory while achieving 90% of the performance potential of idealized on-chip meta-data storage.
000140305 6531_ $$atemporal memory streaming
000140305 6531_ $$aprefetch
000140305 6531_ $$acache
000140305 6531_ $$amemory
000140305 700__ $$aWenisch, Thomas F.
000140305 700__ $$aFerdman, Michael
000140305 700__ $$aAilamaki, Anastassia
000140305 700__ $$0243553$$g177958$$aFalsafi, Babak
000140305 700__ $$aMoshovos, Andreas
000140305 7112_ $$cRaleigh, NC$$a15th International Symposium on High-Performance Computer Architecture
000140305 773__ $$tProceedings of the 15th International Symposium on High-Performance Computer Architecture$$q79-90
000140305 8564_ $$uhttp://www.comparch.ncsu.edu/hpca/index.html$$zURL
000140305 8564_ $$uhttps://infoscience.epfl.ch/record/140305/files/stms_hpca09.pdf$$zn/a$$s444188$$yn/a
000140305 909C0 $$xU11837$$0252231$$pPARSA
000140305 909CO $$ooai:infoscience.tind.io:140305$$qGLOBAL_SET$$pconf$$pIC
000140305 917Z8 $$x184046
000140305 917Z8 $$x184046
000140305 937__ $$aPARSA-CONF-2009-020
000140305 973__ $$rREVIEWED$$sPUBLISHED$$aEPFL
000140305 980__ $$aCONF