000139431 001__ 139431
000139431 005__ 20190812205330.0
000139431 022__ $$a0368-4466
000139431 037__ $$aCONF
000139431 245__ $$aA 17ps Time-to-digital Converter Implemented in 65nm FPGA Technology
000139431 260__ $$c2009
000139431 269__ $$a2009
000139431 336__ $$aConference Papers
000139431 6531_ $$aNCCR-MICS
000139431 6531_ $$aNCCR-MICS/CL2
000139431 700__ $$0243380$$g118911$$aFavi, C.
000139431 700__ $$aCharbon, E.$$g146991$$0240305
000139431 7112_ $$d2009$$cMonterey$$aISFPGA
000139431 8564_ $$zURL
000139431 8564_ $$zn/a$$yPostprint$$uhttps://infoscience.epfl.ch/record/139431/files/isfpga09-cfavi.pdf$$s168610
000139431 909C0 $$xU12178$$pAQUA$$0252106
000139431 909CO $$ooai:infoscience.tind.io:139431$$qGLOBAL_SET$$pconf$$pSTI
000139431 917Z8 $$x118911
000139431 937__ $$aAQUA-CONF-2009-008
000139431 973__ $$rREVIEWED$$sPUBLISHED$$aEPFL
000139431 980__ $$aCONF