000124963 001__ 124963
000124963 005__ 20190316234305.0
000124963 0247_ $$2doi$$a10.1109/IWSOC.2005.27
000124963 037__ $$aCONF
000124963 245__ $$aA Software/Hardware Platform For Rapid Prototyping of Video and Multimedia Designs
000124963 269__ $$a2005
000124963 260__ $$bIEEE$$c2005
000124963 336__ $$aConference Papers
000124963 490__ $$aParallel Computing in Electrical Engineering
000124963 520__ $$aTraditional design and test of complex multimedia systems involves a large number of test vectors and is a difficult and time-consuming task. The simulation times are prohibitively long on current desktop computers. Driving actual design scenarios and timing burst behavior which produce real-time effects is difficult to do with current simulation environments. This paper describes a rapid emulation framework for accessing multiple hardware IP blocks on an FPGA. This solution involves an abstraction of the FPGA platform by having a virtual socket layer that resides between the design and the test vehicles. A rapid prototyping platform is thus created, and its use with complex video and multimedia systems is described.
000124963 6531_ $$aLTS3
000124963 700__ $$aSchumacher, Paul
000124963 700__ $$0240111$$aMattavelli, Marco$$g102553
000124963 700__ $$aChirila-Rus, Adrian
000124963 700__ $$aTurney, Robert
000124963 7112_ $$aIWSOC 2005$$cBanff$$dJuly 20-24, 2005
000124963 773__ $$q30-33$$tProceedings of IWSOC 2005 the 5th International Workshop on System-on-Chip for Real-Time Applications
000124963 8564_ $$s431696$$uhttps://infoscience.epfl.ch/record/124963/files/01530911.pdf$$zn/a
000124963 909C0 $$0252397$$pLTS
000124963 909C0 $$0252288$$pSCI-STI-MM$$xU12149
000124963 909CO $$ooai:infoscience.tind.io:124963$$pconf$$pSTI$$qGLOBAL_SET
000124963 917Z8 $$x148230
000124963 937__ $$aGR-LSM-CONF-2005-001
000124963 973__ $$aEPFL$$rNON-REVIEWED$$sPUBLISHED
000124963 970__ $$aSchumacher2005_1431/LTS
000124963 980__ $$aCONF
000124963 981__ $$a87323