Analytical Modelling of Single Electron Transistor (SET) for Hybrid CMOS-SET Analog IC Design
2004
Details
Title
Analytical Modelling of Single Electron Transistor (SET) for Hybrid CMOS-SET Analog IC Design
Author(s)
Mahapatra, S. ; Vaish, V. ; Wasshuber, Ch. ; Banerjee, K. ; Ionescu, A. M.
Published in
IEEE Transactions on Electron Device
Volume
51
Issue
11
Pages
1772-1782
Date
2004
Other identifier(s)
View record in Web of Science
DAR: 5857
DAR: 5857
Laboratories
NANOLAB
Record Appears in
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > NANOLAB - Nanoelectronic Devices Laboratory
Peer-reviewed publications
Work produced at EPFL
Journal Articles
Published
Peer-reviewed publications
Work produced at EPFL
Journal Articles
Published
Record creation date
2007-10-10