A Methodology for Reliability Enhancement of Nanometer- Scale Digital Systems Based on A-Priori Functional Fault- Tolerance Analysis

This paper presents a new approach for monitoring and estimating device reliability of nanometer-scale devices prior to fabrication. A four-layer architecture exhibiting a large immunity to permanent as well as random failures is used. A complete tool for a-priori functional fault tolerance analysis was developed. It is a statistical Monte Carlo based tool that induces different failure models, and does subsequent evaluation of system reliability under realistic constraints. A structured fault modeling architecture is also proposed, which is together with the tool a part of the new design method where reliability is considered as a central focus from an early development stage.


Published in:
VLSI-SoC: From Systems to Silicon, 240, 111-125
Year:
2007
Publisher:
Boston, Springer
Keywords:
Laboratories:


Note: The status of this file is: EPFL only


 Record created 2007-06-26, last modified 2018-03-17

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