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Abstract

The capability of switching the spontaneous polarisation under an applied electric field in ferroelectric materials can be exploited for the use in low power, non-volatile, re-writable memory devices. Currently available commercially is ferroelectric random access memory, FeRAM, which allows for high speed, low voltage and greater write-erase endurance compared to its two main competitors, Flash and EEPROM, when using the one transistor – one capacitor configuration. However, it is desired to further optimise the configuration in order to obtain better densification, faster access time and better reliability. One way to do such is to pass from the ferroelectric capacitors and develop ferroelectric field effect transistors. Exploiting the phenomenon of ferroelectricity and integrating ferroelectrics with the semiconductor technology has not been simple. The FeFET has been demonstrated using a silicon-based transistor, however commercial devices are not available. Challenges arise mainly due to the high temperature deposition of perovskite ferroelectrics causing the degradation of the ferroelectric/semiconductor interface due to inter-diffusion. Acquiring long term retention of the transistor behavior has also been problematic due to phenomenons such as charge injection and depolarisation. In this thesis a new approach to the problem of semiconductor devices with a ferroelectric gate is explored. Instead of using a silicon-based device, semiconductor heterostructures are investigated. Combining the high mobility channel existing in semiconductor heterostructures, with the non-volatile switching of the polarisation in the ferroelectric gate can pave the way to novel future devices. The AlGaN/GaN semiconductor heterostructure was chosen for two main reasons. The first is a two dimensional electron gas, 2DEG, located at the AlGaN/GaN interface which possesses better transport properties than a single layered semiconductor. Secondly, GaN and its alloys are known to have large chemical and temperature stability making them ideal to withstand the high temperature deposition process of perovskite ferroelectrics. The deposition of two ferroelectric layers onto the AlGaN heterostructure were investigated. Lead zirconium titanate, PZT, a traditional perovskite ferroelectric deposited at high temperature, was chosen for its high remanent polarisation and low coercive field. An alternative ferroelectric gate, the co-polymer poly(vinylidene fluoride/trifluoroethylene), P(VDF/TrFE)(70:30) was deposited and of interest due its low crystallisation temperature and low dielectric constant. Its remanent polarisation is smaller and coercive field larger than that of PZT, but were determined sufficient to observe the depletion effect in the two dimensional electron gas. The goals accomplished in this research were: Development of Ferroelectric Gate Processing: Deposition processes of the ferroelectric layers were developed and optimised in order to obtain a high quality ferroelectric, while maintaining the original transport properties of AlGaNs 2DEG. The processing of HfO2 and MgO buffer layers were developed and investigated for their effects on limiting unwanted inter-diffusion and charge injection. PZT Gate on Al0.3Ga0.7N: The first successful development and observation of a PZT gate on a Al0.3Ga0.7N/GaN heterostrucutre was accomplished. A (111) oriented PZT(40:60) ferroelectric gate on the Al0.3Ga0.7N heterostructure depleted the sheet resistance of the 2DEG by a factor of three when poling the PZT layer with –40V directly to the conductive cantilever used in a piezoresponse force microscope. This decrease in sheet resistance was stable for more than three days. P(VDF/TrFE)(70:30) Gate on Al0.3Ga0.7N: The ferroelectric co-polymer P(VDF/TrFE) (70:30) was investigated as a gate on the Al0.3Ga0.7N heterostructure. When the P(VDF/TrFE) was poled with –30V to a top electrode the sheet resistance was modulated by a factor three, however there was no retention of this modulation. Ferroelectric Spontaneous Polarisation on a Semiconductor Heterostructure: It was theoretically derived that when depositing a ferroelectric layer onto a semiconductor heterostructure its spontaneous polarisation is dramatically reduced due to the depolarisation field and may be suppressed completely. This decay in spontaneous polarisation can be minimised by using a ferroelectric layer with a small dielectric constant, which justifies the use of ferroelectric polymers as the gate material. Domain Writing:The technique of domain writing using piezoresponse force microscopy showed that it was possible to create domain patterning on the ferroelectric layers that were deposited onto the Al0.3Ga0.7N heterostructure with sub-micron line resolution, on the order of 300nm or better. Using ferroelectrics on semiconductors is not only limited to ferroelectric memory devices. Other applications could be ferroelectric nano-lithography, where a ferroelectric pattern is written with a piezoresponse force microscope, PFM, and this pattern is projected onto the transistors channel, potentially creating quantum/ballistic devices. The challenge of integrating ferroelectrics with semiconductors has yet to be fully understood. One of the main advancements that was reached with this research is the understanding of the decrease of the spontaneous polarisation when a ferrroelectric layer is deposited onto a semiconductor heterostructure of finite thickness. The maximisation of the ferroelectrics polarisation on 20nm of Al0.3Ga0.7N can be obtained when minimising the dielectric constant of the ferroelectric layer. The current challenge is to get a better physical understanding of the limitation of the retention of the spontaneous polarisation, while discovering methods for its improvement.

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