On-chip transient stability simulator, 10<sup>4</sup> times faster than real time

This paper suggests several approaches for determining the transient stability of a power network by using an analog VLSI chip for simulating the system behavior. The main advantages of using this method are the much shorter computation time and lower complexity compared to the existing methods that are based on numerical calculations or discrete analog emulators


Published in:
ICDS'97. Second International Conference on Digital Power System Simulators, 79 - 84
Year:
1997
Keywords:
Note:
on-chip transient stability simulator;power network model;analog VLSI chip;system behavior simulation;analog VLSI architectures;DC simulation;two-machine system;on-chip analog simulation;
Laboratories:




 Record created 2007-04-04, last modified 2018-03-18


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