Analog VLSI solution to the stability study of power networks

This paper presents three basic approaches for determining the transient stability of a power network by using an analog VLSI chip for simulating or emulating the system behavior. The main advantages of using this method are the much shorter computation time and lower complexity compared to the currently used methods that are based on numerical calculations or discrete analog simulators


Published in:
Proceedings of the Third IEEE International Conference on Electronics, Circuits, and Systems. ICECS '96 (Cat. No.96TH8229), vol.1, 239 - 42
Year:
1996
Keywords:
Note:
analog VLSI chip;stability study;power network simulation;transient stability;analogue simulator;power network emulation;
Laboratories:




 Record created 2007-04-04, last modified 2018-03-18


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