High-throughput surface patterning with wafer-sized stencils fabricated by a DUV/MEMS process

The endeavour to develop nanodevices demands for patterning methods in the nanometer scale. The continuous improvement in lithography methods based on deep UV (DUV), X-ray, or electron beam exposure allow for further progress in integrated circuit hardware manufacturing for the coming years. To bring nanodevices to the market, however, there is a need for fast, low-cost replication nanopatterning methods. In addition, an increased flexibility of the nanopatterning methods is important for the engineering of multimaterial and multifunctional nano/micro-electro-mechanical systems (NEMS/MEMS), such as polymer-based electronic and sensor devices, 3D microfluidic systems, and bio-analytical systems. The above-mentioned high-end patterning methods are all based on photolithography and etching, limiting the flexibility in substrate and material combinations. In addition, they have the drawback of the use of high-cost equipment. A series of alternative, complementary surface patterning methods are currently being developed that do not rely on photoresist exposure and thin-film etching steps, e.g. local printing of molecular layers (soft-lithography) and shadow-mask deposition (nanostencil patterning). The nanostencil method is a resistless patterning method based on direct, local deposition of material on an arbitrary surface through a solid-state silicon nitride (SiN) membrane , . We present here the advances towards a full-wafer (100 mm) DUV/MEMS-based nanostencil to allow high-throughput, large-area nanopatterning of mesoscopic structures (10^9 - 10^5 m). The mesoscopic patterns were first defined by a 4× reduced projection exposure using an ASML wafer stepper and then transferred into a SiN layer by means of reactive ion etching (RIE). The membranes were released by wafer-through etching using potassium hydroxide (KOH). Figure 1 shows the mid-process details of 200 nm DUV patterns after the RIE transfer into the 500-nm thick SiN layer. Patterning of nano-scale structures using stencils allows for a large choice of materials and surfaces to be nanopatterned, since it is a non-contact method and no etch steps need to be applied. We have studied the nanopatterning of metals (Al, Au, Bi, and Cr) on various surfaces (silicon, oxides, freestanding SiN cantilevers, and self-assembled monolayers (SAM)) for different applications (molecular electronics, nano-mechanical devices with a 90 MHz resonance frequency , as well as nano-scale Hall-sensor devices). Unconventional substrates for (Bio) MEMS and NEMS have also been applied such as highly ordered pyrolytic graphite (HOPG), polydimethylsiloxane (PDMS), and SU-8.

Presented at:
Micro- and Nano Engineering 2004 International Conference, Rotterdam, The Netherlands, 19-22 Sept, 2004

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 Record created 2007-03-14, last modified 2018-03-17

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