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  4. High-precision DAC based on a self-calibrated sub-binary radix converter
 
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conference paper

High-precision DAC based on a self-calibrated sub-binary radix converter

Pastre, M.  
•
Kayal, M.  
2004
2004 Ieee International Symposium on Circuits and Systems
IEEE International Symposium on Circuits and Systems

A novel DAC architecture based on a sub-binary radix converter is presented. By calibrating digitally the nonlinear sub-binary converter, it is possible to use it as a high-precision, high-resolution digital-to-analog converter. The analog part of the new DAC doesn't need precise components. It becomes thus possible to build high-performance DACs on a small area, neither requiring aggressive analog design nor highly matched components. By relaxing the constraints on the analog part, this new topology is very promising for the design of high-performance converters with modem technologies. Both digital and analog components are straightforward to design, allowing their automated synthesis by CAD tools. The new converter structure is presented, and the necessary calibration and conversion algorithms are detailed.

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Type
conference paper
DOI
10.1109/ISCAS.2004.1328201
Web of Science ID

WOS:000223122300086

Author(s)
Pastre, M.  
•
Kayal, M.  
Date Issued

2004

Journal
2004 Ieee International Symposium on Circuits and Systems
Volume

1

Start page

341

End page

344

Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
ELAB  
LEG1  
Event nameEvent placeEvent date
IEEE International Symposium on Circuits and Systems

Vancouver, Canada

May 23-26, 2004

Available on Infoscience
October 21, 2010
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/55940
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