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  4. Methodology for the Hardware/Software Co-Design of Dataflow Programs
 
conference paper

Methodology for the Hardware/Software Co-Design of Dataflow Programs

Roquier, Ghislain  
•
Thavot, Richard  
•
Mattavelli, Marco  
2011
2011 IEEE Workshop on Signal Processing Systems (SiPS)
SIPS 2011, IEEE WS on Signal processing Systems

New generations of multi-core processors and reconfigurable hardware platforms are expected to provide a dramatic increase of processing capabilities. However, one obstacle for exploiting all the promises of such new platforms is the legacy of current applications and the development methodologies used, which is deeply rooted in a sequential way of thinking. A paradigm shift is necessary at all levels of application development to yield portable and efficient implementations, capable of exploiting the full potential of such platforms. Dataflow programming is an alternative approach that address the problem of providing portable and scalable parallel applications. Dataflow programming is able to explicitly expose the intrinsic parallelism of applications. This paper presents a hardware/software co-design methodology that starting from a unique dataflow program enables, by the direct synthesis of both hardware (HDL) and software components (C/C++), to map a signal processing application onto heterogeneous systems architectures composed by reconfigurable hardware and multi-core processors. Experimental results based on the implementation of the MPEG-4 Simple Profile decoder onto an heterogeneous platform are also provided to show the capabilities and flexibility of the approach.

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Type
conference paper
DOI
10.1109/SiPS.2011.6088970
Web of Science ID

WOS:000299390800031

Author(s)
Roquier, Ghislain  
Thavot, Richard  
Mattavelli, Marco  
Date Issued

2011

Publisher

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa

Published in
2011 IEEE Workshop on Signal Processing Systems (SiPS)
Start page

174

End page

179

Subjects

dataflow programming

•

hardware/software co-design

•

reconfigurable hardware

•

multi-core processor

•

Networks

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
SCI-STI-MM  
Event nameEvent placeEvent date
SIPS 2011, IEEE WS on Signal processing Systems

Beirut Lebanon

Oct.4-7, 2011

Available on Infoscience
January 4, 2012
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/76299
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