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  4. Facile: A Language and Compiler for High-performance Processor Simulators
 
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conference paper

Facile: A Language and Compiler for High-performance Processor Simulators

Schnarr, Eric C.
•
Hill, Mark D.
•
Larus, James R.
2001
ACM SIGPLAN 2001 Conference on Programming Language Design and Implementation

Architectural simulators are essential tools for computer architecture and systems research and development. Simulators, however, are becoming frustratingly slow, because they must now model increasingly complex micro-architectures running realistic workloads. Previously, we developed a technique called fast-forwarding, which applied partial evaluation and mermoization to improve the performance of detailed architectural simulations by as much as an order of magnitude [14]. While writing a detailed processor simulator is difficult, implementing fast-forwarding is even more complex. This paper describes Facile, a domain-specific language for writing detailed, accurate micro-architecture simulators. Architectural descriptions written in Facile can be compiled, using partial evaluation techniques, into fast-forwarding simulators that achieve significant performance improvements with far less programmer effort. Facile and its compiler make this performance-enhancing technique accessible to computer architects.

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Type
conference paper
DOI
10.1145/378795.378864
Author(s)
Schnarr, Eric C.
•
Hill, Mark D.
•
Larus, James R.
Date Issued

2001

Publisher

ACM

Published in
ACM SIGPLAN 2001 Conference on Programming Language Design and Implementation
Start page

321

End page

331

Peer reviewed

REVIEWED

Written at

OTHER

EPFL units
VLSC  
Available on Infoscience
December 23, 2013
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/98677
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