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  4. A 50 MBPS 4x4 maximum likelihood decoder for multiple-input multiple-output systems with QPSK modulation
 
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conference paper

A 50 MBPS 4x4 maximum likelihood decoder for multiple-input multiple-output systems with QPSK modulation

Felber, N.
•
Fichtner, W.
•
Burg, A.  
2003
Icecs 2003: Proceedings Of The 2003 10Th Ieee International Conference On Electronics, Circuits And Systems
10th IEEE International Conference on Electronics, Circuits and Systems

In this article we present an efficient approach for the implementation of optimum maximum likelihood decoding of QPSK modulated multiple-input-multiple-output data streams. The proposed method does not compromise optimality of the detection algorithm. Instead it uses the special properties of QPSK modulation together with algebraic transformations and architectural optimizations to achieve very low hardware complexity and high speed. To our knowledge it is the fastest and most area efficient reported VLSI implementation of a hard decission Maximum Likelihood decoder for QPSK based MIMO systems. It can be applied to a variety of narrow band and wideband systems in many different configurations, including different degrees of spatial multiplexing and receive diversity.

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Type
conference paper
DOI
10.1109/ICECS.2003.1302044
Web of Science ID

WOS:000221510600084

Author(s)
Felber, N.
•
Fichtner, W.
•
Burg, A.  
Date Issued

2003

Publisher

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa

Published in
Icecs 2003: Proceedings Of The 2003 10Th Ieee International Conference On Electronics, Circuits And Systems
ISBN of the book

0-7803-8163-7

Volume

1

Start page

332

End page

335

Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
TCL  
Event nameEvent placeEvent date
10th IEEE International Conference on Electronics, Circuits and Systems

Sharjah, U ARAB EMIRATES

Dec 14-17, 2003

Available on Infoscience
June 6, 2011
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/68352
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