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  4. Design and Implementation of A Rail-to-Rail 460-kS/s 10-bit SAR ADC for the Power-Efficient Capacitance Measurement
 
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research article

Design and Implementation of A Rail-to-Rail 460-kS/s 10-bit SAR ADC for the Power-Efficient Capacitance Measurement

Wang, Shenjie  
•
Dehollain, Catherine  
2015
Ieee Transactions On Instrumentation And Measurement

This paper presents the design and implementation of a rail-to-rail 460-kS/s 10-bit successive approximation register analog-to-digital converter (ADC) for the power-efficient capacitance measurement. The specifications of ADC are optimized at system level, emphasizing the ADC following a switched-capacitor capacitance-to-voltage (C2V) converter. To be compatible to the output of C2V, a bootstrap switch with body effect reduction is adopted to provide the rail-to-rail processing ability. The charge redistribution converter is implemented by a single-ended cascaded binary-weighted capacitive digital-to-analog converter (DAC). The total area of the DAC array is not only limited by the matching behavior but also by the noise performance of C2V. To relax the settling requirement and improve the power efficiency, self-timing technique is employed which borrows extra half clock period for open-loop settling of preamps. The balance between noise and power consumption of dynamic comparator with preamps is also considered. The ADC circuit was implemented in 0.18-mu m CMOS technology and occupies an active area of 0.18 mm(2). The tested prototype achieves a signal-to-noise-plus-distortion ratio of 54 dB and a spurious-free dynamic range of 68 dB. The integral nonlinearity and differential nonlinearity are 0.5 and 0.34 least-significant-bit, respectively. The total power consumption is 21 mu W corresponding to 110 fJ/conversion-step figure of merit.

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Type
research article
DOI
10.1109/Tim.2014.2365405
Web of Science ID

WOS:000352492400006

Author(s)
Wang, Shenjie  
•
Dehollain, Catherine  
Date Issued

2015

Publisher

Institute of Electrical and Electronics Engineers

Published in
Ieee Transactions On Instrumentation And Measurement
Volume

64

Issue

4

Start page

888

End page

901

Subjects

Analog-to-digital converter (ADC)

•

comparator

•

digital-to-analog converter (DAC)

•

energy scheme

•

nonlinearity

•

successive approximation register (SAR)

•

switch

Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
SCI-STI-CD  
Available on Infoscience
May 29, 2015
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/114340
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