Repository logo

Infoscience

  • English
  • French
Log In
Logo EPFL, École polytechnique fédérale de Lausanne

Infoscience

  • English
  • French
Log In
  1. Home
  2. Academic and Research Output
  3. Journal articles
  4. Garbled Circuits Reimagined: Logic Synthesis Unleashes Efficient Secure Computation
 
research article

Garbled Circuits Reimagined: Logic Synthesis Unleashes Efficient Secure Computation

Yu, Mingfei  
•
Marakkalage, Dewmini Sudara  
•
De Micheli, Giovanni  
December 1, 2023
Cryptography

Garbled circuit (GC) is one of the few promising protocols to realize general-purpose secure computation. The target computation is represented by a Boolean circuit that is subsequently transformed into a network of encrypted tables for execution. The need for distributing GCs among parties, however, requires excessive data communication, called garbling cost, which bottlenecks system performance. Due to the zero garbling cost of XOR operations, existing works reduce garbling cost by representing the target computation as the XOR-AND graph (XAG) with minimal structural multiplicative complexity (MC). Starting with a thorough study of the cipher-text efficiency of different types of logic primitives, for the first time, we propose XOR-OneHot graph (X1G) as a suitable logic representation for the generation of low-cost GCs. Our contribution includes (a) an exact algorithm to synthesize garbling-cost-optimal X1G implementations for small-scale functions and (b) a set of logic optimization algorithms customized for X1Gs, which together form a robust optimization flow that delivers high-quality X1Gs for practical functions. The effectiveness of the proposals is evidenced by comprehensive evaluations: compared with the state of the art, 7.34%, 26.14%, 13.51%, and 4.34% reductions in garbling costs are achieved on average for the involved benchmark suites, respectively, with reasonable runtime overheads.

  • Details
  • Metrics
Type
research article
DOI
10.3390/cryptography7040061
Web of Science ID

WOS:001131126700001

Author(s)
Yu, Mingfei  
Marakkalage, Dewmini Sudara  
De Micheli, Giovanni  
Date Issued

2023-12-01

Publisher

MDPI

Published in
Cryptography
Volume

7

Issue

4

Start page

61

Subjects

Technology

•

Garbled Circuits

•

Logic Synthesis

•

Secure Multiparty Computation

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

FunderGrant Number

Synopsys Inc.

Available on Infoscience
February 20, 2024
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/204837
Logo EPFL, École polytechnique fédérale de Lausanne
  • Contact
  • infoscience@epfl.ch

  • Follow us on Facebook
  • Follow us on Instagram
  • Follow us on LinkedIn
  • Follow us on X
  • Follow us on Youtube
AccessibilityLegal noticePrivacy policyCookie settingsEnd User AgreementGet helpFeedback

Infoscience is a service managed and provided by the Library and IT Services of EPFL. © EPFL, tous droits réservés