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research article

An FPGA-based processing pipeline for high definition stereo video

Greisen, Pierre
•
Heinzle, Simon
•
Gross, Markus
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2011
EURASIP Journal on Image and Video Processing

This paper presents a real-time processing platform for high definition stereo video. The system is capable to process stereo-video streams at resolutions up to 1920x1080 at 30 frames per second (1080p30). In the hybrid FPGA-GPU-CPU system, a high-density FPGA is used to perform not only the low-level image processing tasks such as color interpolation and cross-image color correction, but also to carry out radial undistortion, image rectification, and disparity estimation. We show how the corresponding algorithms can be implemented very efficiently in programmable hardware, relieving the GPU from the burden of these tasks. Our FPGA implementation results are compared to corresponding GPU implementations and to other implementations reported in the literature.

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Type
research article
DOI
10.1186/1687-5281-2011-18
Web of Science ID

WOS:000300093400008

Author(s)
Greisen, Pierre
•
Heinzle, Simon
•
Gross, Markus
•
Burg, Andreas Peter  
Date Issued

2011

Publisher

Hindawi Publishing Corporation

Published in
EURASIP Journal on Image and Video Processing
Volume

2011

Start page

18

Subjects

Video processing pipeline

•

Stereoscopic video

•

Fpga

•

Disparity estimation

•

Image warping

•

Vision System

Peer reviewed

REVIEWED

Written at

OTHER

EPFL units
TCL  
Available on Infoscience
November 27, 2011
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/72841
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