conference paper
FOSS EKV2.6 Verilog-A Compact MOSFET Model
January 1, 2019
49Th European Solid-State Device Research Conference (Essderc 2019)
The EKV2.6 MOSFET compact model has had a considerable impact on the academic and industrial community of analog integrated circuit design, since its inception in 1996. The model is available as a free open-source software (FOSS) tool coded in Verilog-A. The present paper provides a short review of foundations of the model and shows its capabilities via characterization and modeling based on a test chip in 180 nm CMOS fabricated via Europractice.
Type
conference paper
Web of Science ID
WOS:000520409500048
Author(s)
Grabinski, Wladek
Pavanello, Marcelo
de Souza, Michelly
Tomaszewski, Daniel
Malesinska, Jola
Gluszko, Grzegorz
Bucher, Matthias
Makris, Nikolaos
Nikolaou, Aristeidis
Abo-Elhadid, Ahmed
Date Issued
2019-01-01
Publisher
Publisher place
New York
Published in
49Th European Solid-State Device Research Conference (Essderc 2019)
ISBN of the book
978-1-7281-1539-9
Series title/Series vol.
Proceedings of the European Solid-State Device Research Conference
Start page
190
End page
193
Editorial or Peer reviewed
REVIEWED
Written at
EPFL
EPFL units
| Event name | Event place | Event date |
Cracow, POLAND | Sep 23-26, 2019 | |
Available on Infoscience
April 8, 2020
Use this identifier to reference this record