A new architecture of a Hall microsystem for low-power applications is presented. The innovation in this paper lies in the re-use of the electric current for biasing of several parts in the microsystem permitting substantial reduction of the current consumption. In this manner, four Hall devices were embedded into a differential difference amplifier, and signal treatment techniques for 1/f noise suppression were implemented to the system. The microsystem integrated in a standard 0.8 um double-poly, double-metal CMOS process exhibits an output sensitivity of 37.5 V/T and a magnetic field resolution of 500 nT/√Hz at 1 Hz. Its current consumption was reduced by 45% down to 2.4 mA compared to a similar Hall microsystem with conventional architecture having separated biasing of the sensing part and the electronic part.