Repository logo

Infoscience

  • English
  • French
Log In
Logo EPFL, École polytechnique fédérale de Lausanne

Infoscience

  • English
  • French
Log In
  1. Home
  2. Academic and Research Output
  3. Conferences, Workshops, Symposiums, and Seminars
  4. Reconfigurable Forward Homography Estimation System for Real-Time Applications
 
Loading...
Thumbnail Image
conference paper

Reconfigurable Forward Homography Estimation System for Real-Time Applications

Popovic, Vladan  
•
Leblebici, Yusuf  
2014
Proceedings of the 22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)

Image processing and computer vision algorithms extensively use projections, such as homography, as one of the processing steps. Systems for homography calculation usually observe homography as an inverse problem and provide an exact solution. However, the systems processing larger resolution images cannot meet inherently tight real-time constraints. Look-up table based systems provide an option for forward homography solutions, but they require large memory availability. Recent compressed look-up table methods reduce the memory requirements at the expense of lower peak signal-to-noise-ratio. In this work, we present a forward homography estimation algorithm which provides higher image quality than compressed look-up table methods. The algorithm is based on bounding the homography error, and neglecting the pixels out of the determined bound. The presented FPGA implementation of the estimation system requires a small amount of hardware, and no memory storage. The prototype system project an image frame onto a spherical surface at 295 Mpixels/s rate which is, up to our knowledge, currently the fastest homography system.

  • Files
  • Details
  • Metrics
Type
conference paper
DOI
10.1109/VLSI-SoC.2014.7004161
Author(s)
Popovic, Vladan  
•
Leblebici, Yusuf  
Date Issued

2014

Journal
Proceedings of the 22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
LSM  
Event nameEvent placeEvent date
22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)

Playa del Carmen, Mexico

October, 2014

Available on Infoscience
July 27, 2014
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/105295
Logo EPFL, École polytechnique fédérale de Lausanne
  • Contact
  • infoscience@epfl.ch

  • Follow us on Facebook
  • Follow us on Instagram
  • Follow us on LinkedIn
  • Follow us on X
  • Follow us on Youtube
AccessibilityLegal noticePrivacy policyCookie settingsEnd User AgreementGet helpFeedback

Infoscience is a service managed and provided by the Library and IT Services of EPFL. © EPFL, tous droits réservés