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  4. 193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing
 
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conference paper

193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing

Rossi, Davide
•
Pullini, Antonio
•
Loi, Igor
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2016
2016 Ieee Symposium In Low-Power And High-Speed Chips (Cool Chips Xix)
2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX)

Low power (mW) and high performance (GOPS) are strong requirements for compute-intensive signal processing in E-health, Internet-of-Things, and wearable applications. This work presents a building block for programmable Ultra-Low Power accelerators, namely a tightly-coupled computing cluster that supports parallel and sequential execution at high energy efficiency over a wide range of workload requirements. The cluster, implemented in 28nm UTBB FD-SOI technology, achieves peak energy efficiency in the near-threshold (NVT) operating region: 193 MOPS/mW at 162 MOPS for parallel workloads, and 90 MOPS/mW at 68 MOPS for sequential workloads at 0.46V and 0.5V, respectively. The energy efficient operating range is wide (0.32V to 1.15V), also meeting the design goal of 1 GOPS within a 10 mW power envelope (at 0.66V).

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Type
conference paper
DOI
10.1109/CoolChips.2016.7503670
Web of Science ID

WOS:000386772000001

Author(s)
Rossi, Davide
•
Pullini, Antonio
•
Loi, Igor
•
Gautschi, Michael
•
Gürkaynak, Frank Kagan
•
Teman, Adam Shmuel  
•
Constantin, Jeremy Hugues-Felix  
•
Burg, Andreas Peter  
•
Miro-Panades, Ivan
•
Beignè, Edith
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Date Issued

2016

Publisher

Ieee

Publisher place

New York

Published in
2016 Ieee Symposium In Low-Power And High-Speed Chips (Cool Chips Xix)
ISBN of the book

978-1-5090-1386-9

Total of pages

3

Series title/Series vol.

Proceedings for IEEE COOL CHIPS

Subjects

microprocessor chips

•

multiprocessing systems

•

parallel processing

•

body biasing

•

UTBB FD-SOI

•

power management

•

energy efficicency

Peer reviewed

REVIEWED

Written at

OTHER

EPFL units
TCL  
Event nameEvent placeEvent date
2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX)

Yokohama, Japan

April 20-22, 2016

Available on Infoscience
July 28, 2016
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/128163
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