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research article

Modeling Minority Carriers Related Capacitive Effects for Transient Substrate Currents in Smart Power ICs

Stefanucci, Camillo  
•
Buccella, Pietro  
•
Kayal, Maher  
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2015
IEEE Transactions on Electron Devices

This paper presents an extended model for transient and ac circuit-level simulation of minority carriers propagation through the substrate of smart power integrated circuits (ICs). A p-n junction and a diffusion resistor with capacitive components are proposed to efficiently simulate transient parasitic coupled currents in high-power stages. From a general chip layout, an equivalent substrate network including capacitive effects (junction and diffusion capacitances) can be extracted and parasitic bipolar transistor can be simulated for the first time in transient operation by circuit simulators once the minority carriers continuity conditions are satisfied. This paper shows simulation results of the implemented models in good agreement with those obtained from technology computer-aided design. This implies that transient layout dependent mechanisms between high-voltage aggressor wells and low-voltage victims can be verified in early stages of IC design flow.

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Type
research article
DOI
10.1109/Ted.2015.2397394
Web of Science ID

WOS:000351753900021

Author(s)
Stefanucci, Camillo  
•
Buccella, Pietro  
•
Kayal, Maher  
•
Sallese, Jean-Michel  
Date Issued

2015

Publisher

Institute of Electrical and Electronics Engineers

Published in
IEEE Transactions on Electron Devices
Volume

62

Issue

4

Start page

1215

End page

1222

Subjects

Bipolar transistors

•

minority carriers

•

power semiconductor devices

•

smart power integrated circuit (IC)

•

substrate noise

Peer reviewed

REVIEWED

Written at

EPFL

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ELAB  
EDLAB  
Available on Infoscience
May 29, 2015
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/114373
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